TY - GEN
T1 - Crane
T2 - 58th IEEE/ACM International Symposium on Microarchitecture , MICRO 2025
AU - Gong, Yu
AU - Huang, Lingyi
AU - Chang, Haodong
AU - Liang, Rongjian
AU - Yang, Cheng
AU - Tang, Zhexiang
AU - Hu, Jiang
AU - Yuan, Bo
N1 - Publisher Copyright:
© 2025 Copyright held by the owner/author(s).
PY - 2025/10/17
Y1 - 2025/10/17
N2 - Tiled architectures have emerged as a compelling platform for scaling deep neural network (DNN) execution, offering both compute density and communication efficiency. To harness their full potential, effective inter-layer scheduling is crucial for managing operation order, memory behavior, and compute resource coordination. However, current schedulers often fall short due to three persistent issues: incomplete treatment of core design factors, limited flexibility in handling diverse workload structures, and reliance on heuristic search algorithms with poor convergence. In this work, we trace these limitations to the absence of a unified and expressive scheduling representation. We introduce Crane, a framework that addresses these gaps through a hierarchical table-format abstraction capable of encoding rich scheduling semantics. Crane supports both inference and training workloads, and reformulates scheduling as a mathematically structured optimization problem, enabling more complete and efficient exploration of the scheduling space. Evaluations show that Crane reduces energy-delay product by up to 21.01 × and improves scheduling speed by at least 2.82 × over state-of-the-art baselines.
AB - Tiled architectures have emerged as a compelling platform for scaling deep neural network (DNN) execution, offering both compute density and communication efficiency. To harness their full potential, effective inter-layer scheduling is crucial for managing operation order, memory behavior, and compute resource coordination. However, current schedulers often fall short due to three persistent issues: incomplete treatment of core design factors, limited flexibility in handling diverse workload structures, and reliance on heuristic search algorithms with poor convergence. In this work, we trace these limitations to the absence of a unified and expressive scheduling representation. We introduce Crane, a framework that addresses these gaps through a hierarchical table-format abstraction capable of encoding rich scheduling semantics. Crane supports both inference and training workloads, and reformulates scheduling as a mathematically structured optimization problem, enabling more complete and efficient exploration of the scheduling space. Evaluations show that Crane reduces energy-delay product by up to 21.01 × and improves scheduling speed by at least 2.82 × over state-of-the-art baselines.
KW - Deep Neural Networks
KW - Inter-layer Scheduling
KW - Tiled Architecture
UR - https://www.scopus.com/pages/publications/105021356657
UR - https://www.scopus.com/pages/publications/105021356657#tab=citedBy
U2 - 10.1145/3725843.3756023
DO - 10.1145/3725843.3756023
M3 - Conference contribution
AN - SCOPUS:105021356657
T3 - Proceedings of the Annual International Symposium on Microarchitecture, MICRO
SP - 1250
EP - 1263
BT - MICRO 2025 - 58th IEEE/ACM International Symposium on Microarchitecture
PB - IEEE Computer Society
Y2 - 18 October 2025 through 22 October 2025
ER -